Feb 262026
 

In for repair is a Sega Golden Axe II Revenge of Death Adder boardset. The board set consists of a large mainboard that handles all the logic processing, a daughterboard with the game data ROMs and another daughterboard that handles inputs for Player 3 and Player 4.

Although the boardset is in clean physical condition, it doesn’t boot up.

The first question with any Sega System 16, 18 or 32 game board that won’t boot up is “Has it suicided?” All three platforms used encrypted code on the CPU ROMs and a protection mechanism to decrypt the code before it runs on the Main CPU. If the protection mechanism fails then the Main CPU hangs waiting for code it can run. Sometimes the protection mechanism is battery-powered, and when the battery dies then the decryption mechanism permanently breaks – hence the term “suicide”.

In the case of Golden Axe II, the protection mechanism is this small daughterboard sitting on top of the ROM board.

This protection board is a mini-computer by itself. The Sega 315-5533-02 is a 10 mhz CPU that runs code from the single onboard EPROM and uses the Fujitsu RAM for processing the decryption algorithms. Here, it’s possible for either the onboard EPROM to become corrupted or the Fujitsu RAM to fail, resulting in the decryption CPU crashing and the Main CPU then hanging up waiting for incoming code it can run. At least there’s not a battery here to worry about…

Fortunately, I had a quick and easy method to determine if this Golden Axe II ROM board had suicided. I have my own fully-functional Golden Axe II board set, so I swapped the project’s ROM board over to my personal main board and powered up.

The game booted up and played perfectly. Therefore the ROM board hasn’t suicided and the problem is with the System 32 main board.

I hadn’t worked on a System 32 main board before, so I started performing some research. Specifically, I wanted to know:

  • Are schematics available for this hardware?
  • Are there repair logs of other technicians resolving similar issues with this hardware?

As far as schematics go, Nemesis has scanned and shared them. In order to aid SEO, I also mirrored them here. As far as repair logs go, The Guru has logs on several similar System 32 repairs. Here are some key discoveries I made from Guru’s writeups about Sega System 32 hardware when the main board doesn’t boot up:

  • Reset signals originate at the TTL logic chips located at IC11 and IC12.
  • Clock signals originate at the two oscillators at the bottom-middle of the board and are distributed around the board by a handful of TTL logic chips (IC23, IC24, IC34, IC39, IC52, IC53).
  • The game will not boot if either the NEC V60 Main CPU or Zilog Z80 Sound CPU are nonfunctional.

Time to dig in. I started with checking the Reset signals. The Main CPU, Sound CPU, and some of the other components on the board need to be Reset when the board starts up. There is also a “watchdog” circuit which will trigger the Reset lines and reboot the game if the watchdog detects that the game has frozen. On a logic probe or oscilloscope, the Reset pin on a CPU should initially read High at powerup, go Low briefly as the Reset circuit triggers, then return to High.

I probed the NEC V60 Main CPU Pin 52, Z80 Sound CPU Pin 26 and the outputs on the TTL logic chips at IC11 and IC12. They all showed that the Reset circuit was operating as expected.

Next, I investigated the Clock signals. Think of the Clock as a “heartbeat” that drives the processing logic on the board and keeps everything in sync. Without appropriate Clock signals, the board won’t run.

Clock signals originate from crystal oscillators. The Sega System 32 main board has two of them located in the bottom middle of the board – a 32.2169 mhz clock and a 50 mhz clock.

These clock signals are then distributed around the board and subdivided to lower speeds as needed by a variety of TTL logic chips. Here is the appropriate clock distribution circuits from the schematics.

Many components need a clock signal, but I started by checking the clock input pin on the NEC V60 Main CPU first. The V60 Clock Input pin is Pin 13 and it showed the expected 16 mhz clock signal.

The Z80 Sound CPU clock input is Pin 6 and its signal looked awful.

Time to check the TTL logic chips that feed the clock signal to the Z80. The Z80 clock signal line is labeled “8MC” on the schematics.

And the schematics show that 8MC is output from Pin 7 on a 74LSACT244 TTL chip located at IC24.

I desoldered IC24 from the board and it tested bad out-of-circuit in my logic chip tester.

Since clock signals are driven at a high speed, a standard 74LS244 replacement part won’t suffice. A standard 74LS244 can handle 10 – 15 ns signal switching. The ACT designation on both the schematics and board means that a faster ACT series chip capable of 1 -2 ns signal switching is needed. I had to order some in and for them to arrive.

Unfortunately, the replacement part didn’t fix the board – it still hung with a black screen at boot. I started probing around the other TTL parts in the clock distribution circuits, when to my surprise the board suddenly sprung to life!

Sure, the sprites were garbled and there wasn’t any sound, but I was still pleased to see signs of life. This definitely hints at more problems in the clock distribution circuits. I found that probing IC23 is what would jumpstart the board, so I desoldered that part from the board, and sure enough it tested bad out of circuit.

This part is a 74F112N and I had planned ahead and ordered replacements for these in at the same time as the ACT244s, so I was able to swap a fresh part in right away. However, it still didn’t completely solve the problem. The board would now boot up on its own with clean graphics, but not consistently. The sound also didn’t work, and the game would freeze up often. The self-diagnostic routine in the Service Menu marked four components as faulty and then froze when testing the ROMs.

Since the sound wasn’t working, I decided to check the Z80 Sound CPU in detail for proper operation next.

In addition to the Clock and Reset signals I mentioned earlier, there is also the HALT signal on Pin 18 that will go High only if the Z80 software program triggers it to stop. It probed Low as expected.

Pin 27 is M1 and it starts High and toggles Low when fetching an opcode from memory at the beginning of every machine instruction in the software program. The M1 signal on this Z80 probed as holding High continually so the CPU was not processing instructions – very suspicious.

Next, I checked the WAIT signal on Pin 24. If it is holding Low then another component on the board is triggering the Z80 CPU to stop. It probed as holding High, so nothing else was triggering the Z80 to wait.

Then, I checked the BUSRQ (Bus Request) signal on Pin 25. If it reads Low, that means that another peripheral on the board (such as a DMA controller) has asked the Z80 to release the bus so shared resources (such as memory) can be accessed. The Z80 triggers the BUSAK (Bus Acknowledge) signal after it’s released the bus so that the requesting peripheral knows it can proceed with its operations. The requesting peripheral would then set BUSRQ back to High again when it completed its work and was ready for the Z80 to take back the bus and resume operation. In this case, the BUSRQ signal showed High briefly at power on, then went Low and held there. This meant that the Z80 was receiving a signal to release the bus but then never received a signal to “wake back up” again. Suspicious!

Finally, I checked the BUSAK signal on Pin 23 and finally found the smoking gun. BUSAK is only supposed to trigger after a BUSRQ signal, but on this Z80 the BUSAK was triggering continuously – at exactly the same frequency as the Z80’s 8 mhz Clock signal no less!

This confirmed that the Z80 Sound CPU had failed internally in such a way that the BUSAK line was “echoing” the Clock signal. That was likely confusing all the other components on the board that tied to it!

I desoldered the Z80 CPU, installed a 40 pin socket, and swapped in a replacement 8 mhz Z80 CPU.

Happily this time when powering on, the board functioned perfectly! Sound was present, the game didn’t freeze up, and the self-diagnostics passed with flying colors!

For good measure, I played through the entire game successfully, and left the game running overnight. There were no freezes and the game continued working perfectly. A successful repair!

Seibu Kaihatsu SPI & Raiden Fighters 2

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Jan 142026
 

In for repair is a Seibu Kaihatsu SPI mainboard (V2.0 Revision) and a Raiden Fighters 2 game cartridge.

The SPI mainboard wouldn’t boot – on powerup, it would display a generic “Checksum Error” message.

This is a common problem with the SPI platform. The SPI mainboard and game carts are region coded. If the cart region doesn’t match the mainboard region then you’ll see this error. Additionally, when a game cartridge is accepted, portions of it are flashed to chips on the mainboard. If something goes wrong during the flash process, the mainboard’s region code can be lost, causing it to no longer work with any game.

Happily, Trap15 created a tool called SPI Revive that can be used to write a new region code onto an SPI mainboard. I connected my SPI Revive cartridge, and it shows that the region code for this board is “zero” meaning that it was indeed bricked. I told SPI Revive to write the Japan region code to the board, which it did successfully.

After reconnecting the Raiden Fighters 2 cart, the board started up successfully, flashed itself to the mainboard successfully, and then prompted to restart. After restarting, the game boots up and runs fine, but with “jailbar” lines of corruption running through the sprites.

This is another common issue with game cartridges on this platform. There are several SMD ROMs and a large SMD custom chip. Not much solder was used at the factory and over time, some of the chip legs can detach from their solder pads, breaking the connection.

One way to test for this problem is to press on various chips on the PCB and watch the screen to see if the graphics change. I used a plastic spudger and noticed the jail bars would flicker when I used it to press on ROM chips in the OBJ section. I reflowed the solder on them.

Afterward, the game boots up and runs fine with crisp, clear graphics and sound. The final touch is applying reflective stickers to cover the exposed windows on the two EPROMs missing them on the game cart. A successful repair!

Cave CV1000 (DoDonPachi Saidaioujou)

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Jan 292025
 

In for repair was DoDonPachi Saidaioujou, a Cave shoot-em-up running on a CV1000-D board. This board is one of the recent reproduction bootlegs that’s distinguishable from an original by having gold-plated JAMMA fingers rather than tin-plated.

The board would not boot up at all and a D6 LED would light up.

As per the CV1000 entry at the JAMMArcade.net PCB Encyclopedia, if D6 stays lit up, it indicates a problem with the clock generator located at position X2 on the board. Sure enough, the X2 part on this board is damaged – you can see right into it!

I sourced a replacement part from DigiKey. It is a 32.768 kHz crystal resonator measuring 4.9 mm X 1.8mm . Once the replacement part arrived, I used hot tweezers to remove the old crystal and then soldered the new one in.

That’s all this board needed – with the new crystal in place, the game booted up and functioned perfectly. A successful repair!

Cave CV1000 (Muchi Muchi Pork)

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Dec 232024
 

In for repair was Muchi Muchi Pork, a Cave shoot-em-up running on a CV1000-B board. The game had visual corruption showing on one of the enemies in the game:

Note that the art asset viewer is hidden in this game. Flip Switch S2 on the board to the left, and hold down the Shoot and Bomb buttons while powering on the board. Once the game boots, keep both buttons held and enter the Service Menu. Additional hidden options – including “TGA TEST” for the art asset viewer – should now appear in the Service Menu list.

Cave CV1000 boards used substandard flash storage and are rather notorious for issues with corrupt assets like this. There is further information on these failures at the CV1000 entry at the JAMMArcade.net PCB Encyclopedia.

Previously, repairing this kind of issue would require desoldering the affected flash chip from the PCB, dumping it, modifying the dump to work repaired data in around the failed block of flash, reprogramming the flash chip, and finally resoldering it back to board.

Thankfully, these days buffi has conducted extensive research and produced tools for reprogramming the CV1000 CPU and Art flash chips over JTAG – no soldering required. If the flash fault has occurred in the Art flash chip (U2), Alamone has also produced scripts that automate the difficult step of mapping good data in around the failed flash blocks. With all of these tools in hand, repairing this sort of fault without soldering over JTAG is fairly straightforward.

Note that with CV1000 the Art flash (U2) and CPU flash (U4) are accessible over JTAG while the Sound flash (U23 & U24) are not. Repairing faulty flash issues with the Sound flash thus still requires desoldering and resoldering.

There are two kinds of USB JTAG adapters that can be used for communicating with a CV1000 board – an Altera USB Blaster or a Tigard. I went with a Tigard because it communicates with the CV1000 substantially faster than the Altera.

I’ll break down the steps I used to access this CV1000 board over JTAG.

First, I setup a Raspberry Pi 3 (any Raspberry Pi model should do) with a standard install of Raspbian using the imager available on the Raspberry Pi website.

Next, I downloaded Buffi’s JTAG Python scripts and Alamone’s U2 Compare script to the R-Pi using the web browser on the Pi. I also downloaded a clean MAME ROM of the Muchi Muchi Pork game.

Next, as per Buffi’s instructions, I setup the JTAG libraries on the R-Pi using the Terminal commands. If you use the Tigard JTAG adapter, there is an additional step that’s missing from his documentation. Edit the K9F1G08U0M_JTAG.py file, and on Line 186, change the False to True.

sudo nano K9F1G08U0M_JTAG.py

Next, I connected the Tigard JTAG adpater to the CV1000 board, following Buffi’s pinouts in his instructions. The TRST pin should stay disconnected for now, but it will be connected after booting up the board.

As per Buffi’s instructions, the CV1000 needs to be started up in a special ASE reset hold mode. I flipped Switch S1 so the switch isn’t between the white lines. I connected a DuPont female-to-female jumper wire between Pin 14 (GND) and Pin 3 (TRST). I turned the power on and confirmed that the CV1000 turned on a green light and that the game did not boot up. Finally, I disconnected the Ground jumper wire and connected the TRST pin from the JTAG programmer.

Now, with the software environment ready, the JTAG USB connected and with the CV1000 booted up into the correct mode, I would issue the following commands on the R-Pi to check the JTAG connection to the flash chips:

sudo jtag
cable ft2232 vid=0x403 pid=0x6010 interface=1
detect
detectflash 0

Information about the U4 CPU flash chip was displayed, so the JTAG was communicating with the R-Pi properly.

This board didn’t have any obvious problems with the U4 CPU flash, but I went ahead and dumped it anyway so that I could check it for corruption.

readmem 0 0x200000 u4.bin

Note: if this was a CV1000-D, I would have typed 0x400000 instead of 0x200000.

After a few minutes, the U4 flash was dumped. Uploading it to Hamster’s Online ROM Identification site using the R-Pi’s browser confirmed that it was a 100% match for the MAME dump of the game.

Now it was time for the real culprit – dumping the U2 Art flash. Rather than the jtag prompt, type “quit” to exit, and then use this command:

sudo python3 K9F1G08U0M_JTAG.py read_all --filename=u2bad.bin

With the Tigard adapter, this operation took a few hours to complete. I understand that with the Altera adapter, it can take 3 days.

With a dump of the faulty Art flash now in hand, Alamone’s U2 Compare tool can compare it against a good dump of the art assets and generate patches around the faulty flash. I issued the following command:

sudo python3 u2compare.py u2 u2bad.bin u2fixed.bin

Here, “u2” is the filename of the good Art flash dump from MAME, “u2bad.bin” is the faulty Art flash dump from the board, and “u2fixed.bin” will be the repaired dump.

After a moment, U2 Compare finished its operations. Two bad blocks in the dump were detected, and four patch block files were generated to address them.

The next step is to write the four patch block files back to the Art flash on the CV1000. Buffi recommends backing up the factory Bad Block Table on the flash before any CV1000 flash writing operations, so I went ahead and did that for the Art flash with the following command:

sudo python3 K9F1G08U0M_JTAG.py read_page --page=0 --filename=u2_page0.dmp

And then I wrote the four patch files to the Art flash by issuing each of these commands one at a time:

sudo python3 K9F1G08U0M_JTAG.py write_block --block 0 --filename block-0.bin
sudo python3 K9F1G08U0M_JTAG.py write_block --block 500 --filename block-500.bin
sudo python3 K9F1G08U0M_JTAG.py write_block --block 501 --filename block-501.bin
sudo python3 K9F1G08U0M_JTAG.py write_block --block 502 --filename block-502.bin

Now it was time to disconnect JTAG and test the board. I powered down the CV1000, disconnected the JTAG wires, moved the S1 Switch back to the stock position and powered up. After the game booted, I entered the special service menu and confirmed that the corruption from before was now fixed.

For good measure, I also played through the entire game and confirmed that there was no asset corruption. The game is fixed!

SNK Neo Geo MVS Cartridge (Double Dragon)

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Nov 182024
 

Hello everyone, this time I have a SNK Neo-Geo MVS game cartridge on my desk. It has glitches with some of the graphics.

MVS cartridges consist of 2 boards – the PROG board and the CHA Board.

This particular PROG Board holds 16-bit P ROMs and V ROMs.

P ROMs are Program ROMs. Some other Neo-Geo games use 8-bit parts instead for the P ROMs labeled either SP1/2 or EP1/2.

V ROMs are audio ROMs which holds ADPCM audio samples.

Since this game boots up and runs, and the sound is perfect, we don’t need to examine the PROG board at the moment.

Let’s take a look at CHA board. CHA Boards hold C ROMs, an S ROMs and a M ROM.

M ROM is a 8-bit ROM containing the Z80 Sound CPU program and data. Without it, you don’t get any sound.

S ROMs are Graphics ROMs containing tiles for the “fix” layer. The fix layer is a non-scrollable, tile-based layer with transparency which has the highest priority on the display (it always overlaps sprites). It is most often used to display text or HUDs like scores and health bars.

And finally we have C ROMs. C ROMs are 16 bit sprite graphics ROMs organized in pairs, each containing half of the bitplanes for sprite tiles.

Let’s see the fault with this particular cart before proceeding further. This white square is supposed to display a video:

Where’s the background???

There’s supposed to be two Dragons showing here instead of glitches.

Also you can see a video of the graphics corruption here:

Okay, since the graphics issues are with sprite tiles, we know the problem is with the CHA board, and we know that there’s something wrong with the C ROMs. But which ones?

For this situation, let’s consult the MAME ROMs. MAME’s dump of this game is “doubledr.zip”. Here are the contents – there’s one file for each ROM chip on both boards.

What I will do now is simulate the same error I’m seeing with my physical cart on MAME by corrupting each C ROM file one by one.

Normally, MAME does a hash check on each file when booting up a game – if the hashes don’t match for a file, it won’t start the game. But if you launch MAME from a command prompt, it only warns you and it will start the game.

I’ll start with corrupting the C8 ROM since it is 1MB in size, and thus equivalent to a 27C800 EPROM (of which I have plenty).

That’s looks like it – when MAME runs with a corrupt C8 then the same sprites look glitched as on my cart. The glitches look different glitches but the same sprites are affected.

Let’s desolder the C8 ROM from the board:

The MAME file for this part is 1MB in size. As mentioned above, the EPROM equivalent is a 27C800. Be careful when replacing a mask ROM part with an EPROM part – don’t always do this by size, because some ROMs like M1/S1 use different pinouts.

Here is the CHA board with a socket and programmed 27C800 installed:

Time to power up and give it a shot!

Well, the graphics are looking better than before, but they’re still bad. Here’s the video:

Next, I simulate a corrupt C7 ROM in MAME in the same manner and see that the same sprites glitch. So I go ahead and change out the C7 mask ROM for a 27C800 EPROM on the board too:

Now this is the result:

Everything fixed! Here’s the video:

It turns out that you cannot close up the cartridge shell when using sockets. Therefore, I desolder the sockets out and solder in the replacement EPROMs without sockets.

Best Regards

Oguz

[Editor Note: Check out the Neo-Geo Development Wiki for extensive technical information on the Neo-Geo platform]

 Posted by at 7:16 pm