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Konami/Centuri Hypersports repair log – “The board from hell” part 1

General, PCB Repair Logs, Repair Logs 2 Responses »

Apr 152017

I’ve decided to do this in two parts, the reason for this is that the faults to this board are so extensive. I am convinced that this board was hit by a bolt of lightning.

Symptoms – game booting to a screen full of zeros and watchdog barking. Z80s reset pin was also asserting but the sequence was incorrect ( just a hi flashing signal on the logic probe with no low ). There was also a perpetual low frequency sound with a higher pitched sound superimposed on top of that.

Did the usual troubleshooting. +5.15v voltage at the edge and 4.5v at the chips. Thought this was a little low. Something is dragging it down, I decide not to panic too much.

A previous repair was attempted so I decided to check all the socketed chips out of circuit first before proceeding with my own troubleshooting. Brand new components H16,E12,G17,G18 and the 74LS245 at H17 tested good. All EPROMs on the top board checked out fine with romident.

The owner of the board mentioned that the board was activating the coin meter on its own, then that eventually stopped. I take a stab at the 74LS08 at A2 which seems to drive COIN 2. My logic probe registers dead outputs on the chip and it tests bad out of circuit too. Of course changing it made no difference to how the game runs. I would soon discover that the 74ls08 seems to be a high failure Fujitsu component in this board.

Troubleshooting the z80 reset

I wanted to check out what was going on with the strange reset behavior of the Z80 reset line first.I remove D18 and test it out of circuit, sure enough it tests bad so I replace it. This fixes the reset signal and it’s now going from low to high as expected. Half the pins on the z80 are floating and the data lines aren’t toggling so I remove it and install a replacement from a parts board. The new z80 is alive although not for long before the CPU crashes and the data lines get stuck again.

At some point in the repair the Z80’s data lines stopped toggling again from an initial reset. I traced this to stuck enables on the LS138 at C18 which tested fine out of circuit but the 74LS08 at C9 feeding /G2A on C18 actually failed. Replacing C9 fixed it again. I still had stuck /OEs on both sound EPROMs but I would look at this issue later.

For some reason A16 on the bottom board caught my attention, of course this was a Fujitsu branded 74LS08 as well. I had a brand new one in my hand so I thought “what the hell” and piggy backed the new one on top of it. This seems to have cleared the screen with the initial junk. I also found another bad 74LS08 at H2 which changed nothing after replacing it.

I also found 4 additional bad chips @ F13, E15,C12 & C14 and replaced those with no obvious change.

Troubleshooting the Konami1 – watchdog / reset issue

With pin 19 barking furiously I decided to trace it’s origin thinking that perhaps there was a problem with the watchdog. Both /E and /Q clock frequencies were correct on the CPU ( 1.53Mhz ) .

I found a bad resistor at r43 ( measured 2kohms instead of 1kohm ) so I replaced it, no change.The reset signal actually originates from the bottom board .I traced and tested every chip in it’s path starting from the Konami1. ( top board [D18, B2 then the CR13 connector], bottom board [A1,G2,C4, 504 ]. G2 ( Another Fujitsu 74LS08 ) tested bad, replacing it didn’t change anything after testing. I was starting to lose confidence at this point.

I started to probe the /OE enables to the game EPROMs and saw that every single output was stuck high right from reset. Pins 4 and 5 ( /G2A and /G2B ) of the LS138 @ H16 were floating. For y0-y7 output to go active low, the two above mentioned inputs must be low. Since pins 4 & 5 are tied together I traced this back to pin 28 output of the Konami1. I replaced the CPU temporarily with mine from my Gyruss PCB and now I was getting a screen full of Hs, This meant that the CPU was actually executing code from ROM.

I installed the original CPU back into the PCB and measured around 1v on the inputs of pins 4 & 5 of the LS138. I would soon discover that the CPU was faulty on this line only. This CPU actually works fine in my Gyruss board [ Gyruss does not use the output of pin 28 of the Konami1 ]. So I added a 1kohm pull down resistor between pins 4,5 and ground on the LS138. This pulled the 1v down to more acceptable TTL levels and I finally got this CPU to boot to the screen full of Hs just as you see above with the good CPU. The sprite colours now seem to be showing incorrectly with red streaks compared with the last screenshot.

I installed my testrom into G15 which showed that the main RAM at G2 was bad.

I removed the RAM, socketed the board but the RAM tested good in my TopMax. I probed the RAM with my logic probe and saw no write enable active at all. That would do it! It seems there was a broken trace right near pin 8 of H11 when removing the chip, this was the write enable output to the main RAM. Reconnecting this line fixed the RAM error. The game was finally able to boot with the typical HS issues.

Revisiting the stuck /OE on the sound EPROMs

This ended up being bad 2114s on the top board ( C16 & C17 ). After replacing these I now had sound but unfortunately speech isn’t working. The data lines on the chip are all floating and there seems to be no clock at all. At this point it looks like a bad VLM5030 chip which I’ll have to look at later when I can get a spare.

Video issues

Replacing all four 2114s on the bottom board fixed the flickering but the colour issue still remained. I removed all bipolar PROMs and they all had the wrong checksums. So I’m going to order some and hope to fix the that also.

I’ve also decided to start using my LCD instead of the CRT which seems to have some issues displaying colours at the correct position near the edges of the screen.

After replacing the 2114 rams the Hs look a little wonky and there are some still random sprites. I’m hoping this is normal though. I’m guessing it is since the game code hasn’t had the chance to clear the object and scroll ram so it probably takes on some random values causing the wonkyness and random sprites before proper initialization takes place.

Re-working the Hypersports testrom.

My Hypersports testrom has not been that useful at this point with the text wrapping around the screen and I should have never released it in the first place without testing it myself on real hardware. The 2114 rams on the bottom board are actually banked and occupy the same address by enabling and disabling hardware interrupts ( IRQ ). I had some trouble clearing the scroll and object RAM and it turns out I was only clearing H8 & H9. By enabling interrupts and modifying my code I was able to clear J8 & J9. I confirmed this after looking at the schematics [ the IRQ input to H2 and one of its outputs /OBJSEL ]

I wrote some code to test this and I was able to clear the screen correctly after setting up and enabling the IRQ, then writing 0s from 0x1000 – 0x13ff within the interrupt routine. The results are more than I could have hoped for.

Now all I have to do is implement the checks on J8 & J9 within my IRQ routine. Once that’s done and the necessary changes added then our runner should appear across the screen just like in T&F 🙂

Slap Fight (bootleg) repair log

PCB Repair Logs Comments Off

Apr 112017

Bootlegs are worth a repair too especially when they are classic games like this copy of Slap Fight :

PCB was dead, no sign of activity.At a closer inspection, the main crystal which generates the master clock and the 74S04 inverter were missing from video board:

There are several bootlegs of Slap Fight and each one has a different layout and design but looking at online pictures mine was identical to original board.MAME source told me the exact value of the missing quartz :

/* basic machine hardware */
	MCFG_CPU_ADD("maincpu",Z80, XTAL_36MHz/6) // 6MHz
	 
I was not able to find a 36MHz quartz among my spares (it’s not a common value) so had to order it.I got it in few days:

With the correct clock the PCB sprang to life :

Game was playable but sprites and sound were missing at all:

Sprites data are stored in four 27256 located on CPU board.Data lines of these EPROMs are tied to the inputs of four 74LS166 8-bit shift registers:

Probing the components of this circuit I found that the shift load input (pin 15) in common of the four 74LS166 was stuck high.I traced it back to an output (pin 8) of a 74LS32 whose input pin 9 was stuck too.Tracing this back lead me to the cause of the issue:

Patching the severed trace restored the sprites:

Now the lack of sound.”Listening” with my audio probe the output (pin 5) of the uPC1182 amplifier revealed that sound was present but for some reason it didn’t reach pin 10 partside of the JAMMA edge.A closer inspection revealed a missing electrolytic capacitor (used to filter the output of the amplifier)

I fitted a 1000 uF capacitor as suggested by the typical application circuit of the uPC1182 amplifier:

Another valuable bootleg fixed!

R-Type (bootleg) repair log

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Apr 112017

Had this bootleg of R-Type (manufactured by Philko) laying around since some time:

On power up board was stuck on this garbage static screen:

Like in the original Irem hardware main CPU is a NEC uPD70116 (a.k.a. V30)

Probing it revealed that the RESET signal (active HIGH on this CPU) was missing, pin 21 was going LOW on boot with no transition from HIGH state hence no initialization of the CPU itself

But if I manually resetted the CPU by briefly shorting pin 21 to +5V via a 100 Ohm resistor, the board successfully booted and played perfectly:

Traced pin 21 of the CPU back to pin 10 of the uPD71011 whose pin 11 receives the RESET signal and invert it :

Also the /RESIN input had no initial transition so the problem was upstream.Compared to original hardware the bootlegers semplified the power-ON delay circuit purposely omitting the M51202 voltage comparator (although there is silkscreening and room for it).They used insted few discrete components like a diode, a resistor and an electrolityc capacitor which actually was not present @C6 (most likely it went detached)

This was the cause of the missing RESET.I fitted a 100uF 16V electrolytic capacitor (after experimented different values) and board booted all the time.Job done.

Knuckle Bash repair log #3

PCB Repair Logs Comments Off

Apr 082017

Picked up this faulty Knuckle Bash PCB on Ebay:

The graphics were totally wrong:

The board use a custom marked ‘GP9001’ @U13 which acts like a GPU generating all the parts of graphics (and video timing signals too)

Package is QFP 208 pin so it’s a common issue to find lifted pins of this kind of ICs after some time.Under a microscope it seemed OK :

But actually a lot pins were detached from pad when I probed them with a needle.Reflowing the IC restored all graphics but colors were wrong:

The palette is generated by two 2K x 8-bit static RAMs and all the 16 bits of color data are latched by two 74HCT273:

Probing the two RAMs revealed a stuck bit (D7, pin 17) on the one @U7 (comparison with an healthy signal on the left of the below picture)

This data bit is latched by pin 13 of the 74HCT273 @U9, piggybacking it restored correct colors:

Chip failed in some gates when tested out-of-circuit:

Job done.

Popeye tech info

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Apr 072017

I’ve been working with a Popeye PCB recently and I wanted to figure out the hardware so I thought it would be good to document what I found.

The PCB uses some fairly simple obfuscation for the CPU address lines utilising what the schematics refer to as a PLA device. Further investigation revealed that the devices used on the address bus here are actually 74LS367 at locations 6F and 6H. I originally believed the IC at location 6E to be the same but in the decoding routine that MAME uses, the new address value returned after swapping the bits gets XOR’d by 0x3F.

Checking further I found this chip is actually a 74LS368 (inverting line driver). If you notice on the video PCB there is another chip with its markings removed at location 5U.

This is a 74LS04 inverter and is needed because the lower 6 address bits are inverted from the CPU by the 74LS368 at location 6E so we need to return them to their intended state. Inverting them again allows the video and background RAM to be addressed properly.
All these so called PLA’s are actually regular TTL with their markings etched off.

The data lines are also scrambled and can be easily followed from the schematics.
The code in the program EPROM’s is scrambled to accommodate the above methods.

There are 2 additional IC’s also marked as PLA’s attached to the outputs of 3 x 74LS161 counters at location 3E and 4E. These have been identified as a 74LS365 at location 4E and a 74LS368 at location 3E and are part of the DMA circuit.

NMI
The hardware doesn’t use any other interrupts, only the NMI.
The NMI vector is the same for all Z80 program and starts at address $66 in ROM.
It is triggered essentially by the /VBLANK signal and during this time all the on screen background and sprites are updated.

MAIN RAM
The main RAM for Popeye lies at address $8800 – $8FFF and is a TMM2016 located at 7H on the CPU PCB.
The main RAM doesn’t appear to invert the lower 6 bits of the address bus so the actual locations written to in RAM will be different to what the program actually expects however this is not an issue as all the accesses will give the correct data. In the event of fault finding though this could potentially cause confusion.
DMA accesses to this RAM are all correct.
Access to this RAM is controlled via a 74LS139 at location 8F.
The first demultiplexor of this IC is enabled when address bit A15 is HIGH (address $8000). Output Y0 connects to select input B of the second multiplexor and address bit A11 is connected to select input A. Output Y1 (pin 11) is connected to the /CS pin of the RAM.
In order for Y1 to be active A15 and A11 need to be HIGH (address $8800).

There are two pull-up resistors used on this RAM connected to AD10 and AD11. These are present for when DMA accesses are happening as it only uses 9 bits. Without these resistors AD10 and AD11 would be floating during these times.

BACKGROUND RAM
As we only write nibbles to the RAM section but need to preserve the nibble value we currently are not writing too there is a system in place to deal with that.

/CSBW is generated when we write to anywhere in address $C000 – $CFFF.
This signal clears the DMA access to background RAM and sets the 74LS157 chips to use the address bus instead of DMA.

When a write to the background RAM is initiated the 74LS174 at 8U gets clocked before the write enable for the RAM goes low. This latches the current RAM nibble not being written to, onto the outputs of 8U which lets the RAM get updated without losing data.
The delay for latching the RAM data before writing is achieved by a 74LS20 at 5D on the CPU board. One of these signals is the /WR but goes through a 74LS74 in order to create a delay of 1 clock cycle. This gives enough time to latches the RAM data before the write enable is active on the RAM itself.

SECURITY ALU
There is a security ALU that sits at address $E000 – $E001 in the memory map. It can be both read from and written to. MAME has functional behaviour for this emulated in the driver.
The various modes of the ALU are selected by an IC labelled as ‘Selected Decoder’. This is actually a 74LS139.

I wanted to implement this chip into one of the 28 pin CPLD modules I have. Being an amateur in HDL programming I wasn’t too sure whether the design could be implemented into an unclocked CPLD design so I asked my friend Charles MacDonald for some advice on Verilog.
He kindly sent me a draft code based on the MAME implementation. I have adapted this to reflect the real hardware and it is now implemented and seems to be working. The programming file can be found in the download section if anyone ever feels the need to use it. I would still like to get hold of an original chip to study as although the code for this works with the titles that use it, all the behaviours of the chip are not fully documented that I know of.

Without this chip present Popeye will reset when starting a game. There may be other issues as well but I cannot pinpoint them.
There is an unprotected version of Popeye available in MAME which does away with the requirement for this security chip so there isn’t much need to use a reproduction of this chip.

UPDATED 10/03/2019 – Ace’ informed me of an error. 4E is actually a 74LS365 NOT a 74LS367 like originally stated.

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